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Sylvain Huet

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2008
6EEBertrand Le Gal, Emmanuel Casseau, Sylvain Huet: Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level Synthesis. IEEE Trans. VLSI Syst. 16(11): 1454-1464 (2008)
2007
5EESylvain Huet, Sebastien LeNours, Olivier Pasquier, Emmanuel Casseau: Granularity Issues in Transaction Level Modelling Digital Signal Processing Applications. FDL 2007: 177-184
2006
4EESylvain Huet, Emmanuel Casseau, Olivier Pasquier: A Computation Core for Communication Refinement of Digital Signal Processing Algorithms. DSD 2006: 240-250
3EESylvain Huet, Emmanuel Casseau, Olivier Pasquier, Sebastien LeNours: Hardware Communication Refinement in Digital Signal Processing. FDL 2006: 177-185
2005
2EESylvain Huet, Emmanuel Casseau, Olivier Pasquier: Design Exploration and HW/SW Rapid Prototyping for Real-Time System Design. IEEE International Workshop on Rapid System Prototyping 2005: 240-243
1EEBertrand Le Gal, Emmanuel Casseau, Sylvain Huet, Eric Martin: Pipelined Memory Controllers for DSP Applications Handling Unpredictable Data Accesses. ISVLSI 2005: 268-269

Coauthor Index

1Emmanuel Casseau [1] [2] [3] [4] [5] [6]
2Bertrand Le Gal [1] [6]
3Sebastien LeNours [3] [5]
4Eric Martin [1]
5Olivier Pasquier [2] [3] [4] [5]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)