| |
| 1994 | ||
|---|---|---|
| 3 | EE | Sudhir M. Gowda, Bing J. Sheu, Wen-Jay Hsu: Testing of programmable analog neural network chips. VLSI Signal Processing 8(3): 267-282 (1994) |
| 1991 | ||
| 2 | Wen-Jay Hsu, Bing J. Sheu, Sudhir M. Gowda: Testing of Analog Neural Array-Processor Chips. ICCD 1991: 118-121 | |
| 1988 | ||
| 1 | EE | Bing J. Sheu, Wen-Jay Hsu, P. K. Ko: An MOS transistor charge model for VLSI design. IEEE Trans. on CAD of Integrated Circuits and Systems 7(4): 520-527 (1988) |
| 1 | Sudhir M. Gowda | [2] [3] |
| 2 | P. K. Ko | [1] |
| 3 | Bing J. Sheu | [1] [2] [3] |