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| 1990 | ||
|---|---|---|
| 1 | EE | Chi-Yi Hwang, Yung-Chin Hsieh, Youn-Long Lin, Yu-Chin Hsu: A fast transistor-chaining algorithm for CMOS cell layout. IEEE Trans. on CAD of Integrated Circuits and Systems 9(7): 781-786 (1990) |
| 1 | Yu-Chin Hsu | [1] |
| 2 | Chi-Yi Hwang | [1] |
| 3 | Youn-Long Lin | [1] |