Richard F. Hobson

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11EERichard F. Hobson: A New Single-Ended SRAM Cell With Write-Assist. IEEE Trans. VLSI Syst. 15(2): 173-181 (2007)
10EERichard F. Hobson, Allan R. Dyck, Keith Cheung: SoC Features for a Multi-Processor WCDMA Base-station Modem. IWSOC 2004: 318-321
9EERichard F. Hobson, Allan R. Dyck: A Multiple-Input Single-Phase Clock Flip-Flop Family. Great Lakes Symposium on VLSI 1999: 240-241
8EER. Balakrishnan, Richard F. Hobson: A Greedy Router with Technology Targetable Output. Great Lakes Symposium on VLSI 1999: 252-255
7EEAllan R. Dyck, S. Evenson, H. Fu, Richard F. Hobson: User selectable feature support for an embedded processor. ISCAS (1) 1999: 9-12
6EERichard F. Hobson, P. S. Wong: A parallel embedded-processor architecture for ATM reassembly. IEEE/ACM Trans. Netw. 7(1): 23-37 (1999)
5EERichard F. Hobson: Power Reducing Techniques for Clocked CMOS PLAs. Great Lakes Symposium on VLSI 1998: 34-38
4EERichard F. Hobson, J. D. Hoskin, R. W. Spilsbury: Opportunities for System and User Features in a New APL Interpreter. APL 1989: 190-196
3EERichard F. Hobson: A Directly Executable Encoding for APL. ACM Trans. Program. Lang. Syst. 6(3): 314-332 (1984)
2EERichard F. Hobson: Software sympathetic chip set design. AFIPS National Computer Conference 1981: 3-10
1 Richard F. Hobson: Structured Machine Design: An Ongoing Experiement. ISCA 1981: 37-56

Coauthor Index

1R. Balakrishnan [8]
2Keith Cheung [10]
3Allan R. Dyck [7] [9] [10]
4S. Evenson [7]
5H. Fu [7]
6J. D. Hoskin [4]
7R. W. Spilsbury [4]
8P. S. Wong [6]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)