Chia-Lin Ho

2002
2	EE	Shanq-Jang Ruan, Edwin Naroska, Yen-Jen Chang, Chia-Lin Ho, Feipei Lai: Energy analysis of bipartition architecture for pipelined circuits. APCCAS (2) 2002: 7-11
1	EE	Shanq-Jang Ruan, Edwin Naroska, Chia-Lin Ho, Feipei Lai: Power Analysis of Bipartition and Dual-Encoding Architecture for Pipelined Circuits. ICCD 2002: 327-

Coauthor Index

1	Yen-Jen Chang	[2]
2	Feipei Lai	[1] [2]
3	Edwin Naroska	[1] [2]
4	Shanq-Jang Ruan	[1] [2]