| |
| 2009 | ||
|---|---|---|
| 6 | EE | Cristian Soviani, Ilija Hadzic, Stephen A. Edwards: Synthesis and Optimization of Pipelined Packet Processors. IEEE Trans. on CAD of Integrated Circuits and Systems 28(2): 231-244 (2009) |
| 2006 | ||
| 5 | EE | Cristian Soviani, Ilija Hadzic, Stephen A. Edwards: Synthesis of high-performance packet processing pipelines. DAC 2006: 679-682 |
| 2005 | ||
| 4 | Dusan Suvakovic, Ilija Hadzic: An FPGA Application with High Speed Serial Transceiver Running at Sub-nominal Rate. FPL 2005: 229-234 | |
| 2003 | ||
| 3 | EE | Ilija Hadzic, Jonathan M. Smith: Balancing performance and flexibility with hardware support for network architectures. ACM Trans. Comput. Syst. 21(4): 375-411 (2003) |
| 1999 | ||
| 2 | Ilija Hadzic, Sanjay Udani, Jonathan M. Smith: FPGA Viruses. FPL 1999: 291-300 | |
| 1997 | ||
| 1 | Ilija Hadzic, Jonathan M. Smith: P4: A platform for FPGA implementation of protocol boosters. FPL 1997: 438-447 | |
| 1 | Stephen A. Edwards | [5] [6] |
| 2 | Jonathan M. Smith | [1] [2] [3] |
| 3 | Cristian Soviani | [5] [6] |
| 4 | Dusan Suvakovic | [4] |
| 5 | Sanjay Udani | [2] |