| 2003 |
|---|
| 3 | EE | Prashant Saxena,
Satyanarayan Gupta:
On integrating power and signal routing for shield count minimization in congested regions.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(4): 437-445 (2003) |
| 2002 |
|---|
| 2 | EE | B. Chappell,
X. Wang,
P. Patra,
Prashant Saxena,
J. Vendrell,
Satyanarayan Gupta,
S. Varadarajan,
W. Gomes,
S. Hussain,
H. Krishnamurthy,
M. Venkateshmurthy,
S. Jain:
A System-Level Solution to Domino Synthesis with 2 GHz Application.
ICCD 2002: 164- |
| 1 | EE | Prashant Saxena,
Satyanarayan Gupta:
Shield count minimization in congested regions.
ISPD 2002: 78-83 |
