2008 |
19 | EE | Mauricio Cerda,
Bernard Girau:
A neural model with feedback for robust disambiguation of motion.
ESANN 2008: 505-510 |
18 | EE | Cesar Torres-Huitzil,
Bernard Girau:
Implementation of Central Pattern Generator in an FPGA-Based Embedded System.
ICANN (2) 2008: 179-187 |
17 | EE | Cesar Torres-Huitzil,
Bernard Girau,
Miguel Arias-Estrada:
Biologically-Inspired Digital Architecture for a Cortical Model of Orientation Selectivity.
ICANN (2) 2008: 188-197 |
2007 |
16 | EE | Cesar Torres-Huitzil,
Bernard Girau,
Adrien Gauffriau:
Hardware/Software Codesign for Embedded Implementation of Neural Networks.
ARC 2007: 167-178 |
15 | | Bernard Girau,
Amine M. Boumaza:
Embedded harmonic control for dynamic trajectory planning on FPGA.
Artificial Intelligence and Applications 2007: 268-273 |
14 | EE | Bernard Girau,
Cesar Torres-Huitzil:
Massively distributed digital implementation of an integrate-and-fire LEGION network for visual scene segmentation.
Neurocomputing 70(7-9): 1186-1197 (2007) |
2006 |
13 | | Bernard Girau,
Khaled Ben Khalifa:
FPGA-Targeted Neural Architecture for Embedded Alertness Detection.
Artificial Intelligence and Applications 2006: 199-204 |
12 | EE | Bernard Girau,
Cesar Torres-Huitzil:
FPGA implementation of an integrate-and-fire LEGION model for image segmentation.
ESANN 2006: 173-178 |
2005 |
11 | EE | Claudio Castellanos Sánchez,
Bernard Girau:
Dynamic Pursuit with a Bio-inspired Neural Model.
ACIVS 2005: 284-291 |
10 | | Cesar Torres-Huitzil,
Bernard Girau:
FPGA Implementation of an Excitatory and Inhibitory Connectionist Model for Motion Perception.
FPT 2005: 259-266 |
9 | EE | Cesar Torres-Huitzil,
Bernard Girau,
Claudio Castellanos Sánchez:
On-chip visual perception of motion: A bio-inspired connectionist model on FPGA.
Neural Networks 18(5-6): 557-565 (2005) |
2000 |
8 | EE | Bernard Girau:
Simplified neural architectures for symmetric boolean functions.
ESANN 2000: 383-388 |
7 | EE | Bernard Girau:
Building a 2D-Compatible Multilayer Neural Network.
IJCNN (2) 2000: 59-64 |
6 | EE | Bernard Girau:
Digital Hardware Implementation of 2D Compatible Neural Networks.
IJCNN (3) 2000: 506-514 |
5 | EE | Bernard Girau:
FPNA: Interaction Between FPGA and Neural Computation.
Int. J. Neural Syst. 10(3): 243-259 (2000) |
1998 |
4 | EE | Pascal Nussbaum,
Bernard Girau,
Arnaud Tisserand:
Field Programmable Processor Arrays.
ICES 1998: 311-322 |
1995 |
3 | | Bernard Girau:
Mapping Neural Network Back-Propagation onto Parallel Computers with Computation/Communication Overlapping.
Euro-Par 1995: 513-524 |
2 | EE | Bernard Girau,
Hélène Paugam-Moisy:
Load sharing in the training set partition algorithm for parallel neural learning.
IPPS 1995: 586-591 |
1994 |
1 | | Cédric Gégout,
Bernard Girau,
Fabrice Rossi:
NSK, an Object-Oriented Simulator Kernel for Arbitrary Feedforward Neural Networks.
ICTAI 1994: 95-104 |