| |
| 2008 | ||
|---|---|---|
| 2 | EE | Toru Fujimura, Shigetoshi Nakatake: Transistor-level programmable MOS analog IC with body biasing. ISCAS 2008: 153-156 |
| 2006 | ||
| 1 | EE | Takashi Nojima, Nobuto Ono, Shigetoshi Nakatake, Toru Fujimura, Koji Okazaki, Yoji Kajitani: Adaptive Porting of Analog IPs with Reusable Conservative Properties. ISVLSI 2006: 18-23 |
| 1 | Yoji Kajitani | [1] |
| 2 | Shigetoshi Nakatake | [1] [2] |
| 3 | Takashi Nojima | [1] |
| 4 | Koji Okazaki | [1] |
| 5 | Nobuto Ono | [1] |