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Edward Flanigan

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2008
6EERajsekhar Adapa, Edward Flanigan, Spyros Tragoudas: A Novel Test Generation Methodology for Adaptive Diagnosis. ISQED 2008: 242-245
5EEEdward Flanigan, Arkan Abdulrahman, Spyros Tragoudas: Sequential Path Delay Fault Identification Using Encoded Delay Propagation Signatures. ISQED 2008: 633-636
2007
4EERajsekhar Adapa, Edward Flanigan, Spyros Tragoudas, Michael Laisne, Hailong Cui, Tsvetomir Petrov: Function-Based Test Generation for (Non-Robust) Path Delay Faults Using the Launch-off-Capture Scan Architecture. ISQED 2007: 717-722
3EEEdward Flanigan, Spyros Tragoudas: Enhanced Identification of Strong Robustly Testable Paths. ISQED 2007: 729-736
2EEEdward Flanigan, Rajsekhar Adapa, Hailong Cui, Michael Laisne, Spyros Tragoudas, Tsvetomir Petrov: Function-based ATPG for Path Delay Faults using the Launch-Off-Capture Scan Architecture. VLSI Design 2007: 805-812
2006
1EEEdward Flanigan, Themistoklis Haniotakis, Spyros Tragoudas: An Improved Method for Identifying Linear Dependencies in Path Delay Faults. ISQED 2006: 457-462

Coauthor Index

1Arkan Abdulrahman [5]
2Rajsekhar Adapa [2] [4] [6]
3Hailong Cui [2] [4]
4Themistoklis Haniotakis (Th. Haniotakis) [1]
5Michael Laisne [2] [4]
6Tsvetomir Petrov [2] [4]
7Spyros Tragoudas [1] [2] [3] [4] [5] [6]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)