2008 |
28 | EE | Shriram Krishnamurthi,
Kathi Fisler,
Daniel J. Dougherty,
Daniel Yoo:
Alchemy: transmuting base alloy specifications into implementations.
SIGSOFT FSE 2008: 158-169 |
27 | EE | Kathi Fisler:
Implementing domain-specific languages as the foundation of an honors intro CS course.
SIGPLAN Notices 43(11): 66-70 (2008) |
2007 |
26 | EE | Daniel J. Dougherty,
Kathi Fisler,
Shriram Krishnamurthi:
Obligations and Their Interaction with Programs.
ESORICS 2007: 375-389 |
25 | EE | Kathi Fisler:
Two-Dimensional Regular Expressions for Compositional Bus Protocols.
FMCAD 2007: 154-157 |
24 | EE | Shriram Krishnamurthi,
Kathi Fisler:
Foundations of incremental aspect model-checking.
ACM Trans. Softw. Eng. Methodol. 16(2): (2007) |
2006 |
23 | EE | Gary T. Leavens,
Jean-Raymond Abrial,
Don S. Batory,
Michael J. Butler,
Alessandro Coglio,
Kathi Fisler,
Eric C. R. Hehner,
Cliff B. Jones,
Dale Miller,
Simon L. Peyton Jones,
Murali Sitaraman,
Douglas R. Smith,
Aaron Stump:
Roadmap for enhanced languages and methods to aid verification.
GPCE 2006: 221-236 |
22 | EE | Daniel J. Dougherty,
Kathi Fisler,
Shriram Krishnamurthi:
Specifying and Reasoning About Dynamic Access-Control Policies.
IJCAR 2006: 632-646 |
21 | EE | Kathi Fisler:
Toward diagrammability and efficiency in event-sequence languages.
STTT 8(4-5): 431-447 (2006) |
2005 |
20 | EE | Hana Chockler,
Kathi Fisler:
Temporal Modalities for Concisely Capturing Timing Diagrams.
CHARME 2005: 176-190 |
19 | EE | Kathi Fisler,
Shriram Krishnamurthi,
Leo A. Meyerovich,
Michael Carl Tschantz:
Verification and change-impact analysis of access-control policies.
ICSE 2005: 196-205 |
18 | EE | Kathi Fisler,
Shriram Krishnamurthi:
Decomposing Verification Around End-User Features.
VSTTE 2005: 74-81 |
17 | EE | Harry C. Li,
Shriram Krishnamurthi,
Kathi Fisler:
Modular Verification of Open Features Using Three-Valued Model Checking.
Autom. Softw. Eng. 12(3): 349-382 (2005) |
2004 |
16 | EE | Colin Blundell,
Kathi Fisler,
Shriram Krishnamurthi,
Pascal Van Hentenryck:
Parameterized Interfaces for Open System Verification of Product Lines.
ASE 2004: 258-267 |
15 | EE | Shriram Krishnamurthi,
Kathi Fisler,
Michael Greenberg:
Verifying aspect advice modularly.
SIGSOFT FSE 2004: 137-146 |
2003 |
14 | EE | Kathi Fisler:
Towards Diagrammability and Efficiency in Event Sequence Languages.
CHARME 2003: 185-199 |
2002 |
13 | EE | Harry C. Li,
Shriram Krishnamurthi,
Kathi Fisler:
Interfaces for Modular Feature Verification.
ASE 2002: 195-204 |
12 | EE | Harry C. Li,
Shriram Krishnamurthi,
Kathi Fisler:
Verifying cross-cutting features as open systems.
SIGSOFT FSE 2002: 89-98 |
11 | EE | Harry C. Li,
Kathi Fisler,
Shriram Krishnamurthi:
The Influence of Software Module Systems on Modular Verification.
SPIN 2002: 60-78 |
10 | | Kathi Fisler,
Moshe Y. Vardi:
Bisimulation Minimization and Symbolic Model Checking.
Formal Methods in System Design 21(1): 39-78 (2002) |
2001 |
9 | EE | Kathi Fisler,
Shriram Krishnamurthi:
Modular verification of collaboration-based software designs.
ESEC / SIGSOFT FSE 2001: 152-163 |
8 | EE | Kathi Fisler,
Ranan Fraer,
Gila Kamhi,
Moshe Y. Vardi,
Zijiang Yang:
Is There a Best Symbolic Cycle-Detection Algorithm?
TACAS 2001: 420-434 |
1999 |
7 | EE | Kathi Fisler,
Moshe Y. Vardi:
Bisimulation and Model Checking.
CHARME 1999: 338-341 |
6 | | Kathi Fisler:
Timing Diagrams: Formalization and Algorithmic Verification.
Journal of Logic, Language and Information 8(3): 323-361 (1999) |
1998 |
5 | EE | Kathi Fisler,
Moshe Y. Vardi:
Bisimulation Minimization in an Automata-Theoretic Verification Framework.
FMCAD 1998: 115-132 |
4 | EE | Kathi Fisler,
Claude Girault:
Modelling and Model Checking a Distributed Shared Memory Consistency Protocol.
ICATPN 1998: 84-103 |
1997 |
3 | | Kathi Fisler:
Containing of Regular Languages in Non-Regular Timing Diagram Languages is Decidable.
CAV 1997: 155-166 |
2 | | Kathi Fisler,
Robert P. Kurshan:
Verifying VHDL Designs with COSPAN.
Formal Hardware Verification 1997: 206-247 |
1994 |
1 | | Kathi Fisler:
Extending Formal Reasoning with Support for Hardware Diagrams.
TPCD 1994: 298-303 |