| 2008 |
| 8 | EE | Namrata Shekhar,
Priyank Kalla,
M. Brandon Meredith,
Florian Enescu:
Simulation Bounds for Equivalence Verification of Polynomial Datapaths Using Finite Ring Algebra.
IEEE Trans. VLSI Syst. 16(4): 376-387 (2008) |
| 2007 |
| 7 | EE | Sivaram Gopalakrishnan,
Priyank Kalla,
Florian Enescu:
Optimization of Arithmetic Datapaths with Finite Word-Length Operands.
ASP-DAC 2007: 511-516 |
| 6 | EE | Sivaram Gopalakrishnan,
Priyank Kalla,
M. Brandon Meredith,
Florian Enescu:
Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors.
ICCAD 2007: 143-148 |
| 5 | EE | Namrata Shekhar,
Sudhakar Kalla,
Florian Enescu:
Equivalence Verification of Polynomial Datapaths Using Ideal Membership Testing.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(7): 1320-1330 (2007) |
| 2006 |
| 4 | EE | Namrata Shekhar,
Priyank Kalla,
Florian Enescu:
Equivalence verification of arithmetic datapaths with multiple word-length operands.
DATE 2006: 824-829 |
| 3 | EE | Namrata Shekhar,
Priyank Kalla,
M. Brandon Meredith,
Florian Enescu:
Simulation Bounds for Equivalence Verification of Arithmetic Datapaths with Finite Word-Length Operands.
FMCAD 2006: 179-186 |
| 2005 |
| 2 | | Namrata Shekhar,
Priyank Kalla,
Florian Enescu,
Sivaram Gopalakrishnan:
Equivalence verification of polynomial datapaths with fixed-size bit-vectors using finite ring algebra.
ICCAD 2005: 291-296 |
| 1 | EE | Namrata Shekhar,
Priyank Kalla,
Sivaram Gopalakrishnan,
Florian Enescu:
Exploiting Vanishing Polynomials for Equivalence Veri.cation of Fixed-Size Arithmetic Datapaths.
ICCD 2005: 215-220 |