2006 |
12 | EE | Jeffrey S. Vetter,
Sadaf R. Alam,
Thomas H. Dunigan Jr.,
Mark R. Fahey,
Philip C. Roth,
Patrick H. Worley:
Early evaluation of the Cray XT3.
IPDPS 2006 |
2005 |
11 | EE | Thomas H. Dunigan,
Jeffrey S. Vetter,
Patrick H. Worley:
Performance Evaluation of the SGI Altix 3700.
ICPP 2005: 231-240 |
10 | EE | Thomas H. Dunigan Jr.,
Jeffrey S. Vetter,
James B. White III,
Patrick H. Worley:
Performance Evaluation of the Cray X1 Distributed Shared-Memory Architecture.
IEEE Micro 25(1): 30-40 (2005) |
2003 |
9 | EE | Thomas H. Dunigan,
Mark R. Fahey,
James B. White III,
Patrick H. Worley:
Early Evaluation of the Cray X1.
SC 2003: 18 |
2002 |
8 | EE | Tom Dunigan,
Matthew Mathis,
Brian Tierney:
A TCP tuning daemon.
SC 2002: 1-16 |
7 | EE | Patrick H. Worley,
Thomas H. Dunigan,
Mark R. Fahey,
James B. White III,
Arthur S. Bland:
Early evaluation of the IBM p690.
SC 2002: 1-21 |
1999 |
6 | | Patrick H. Worley,
Arthur S. Bland,
Thomas H. Dunigan,
Philip F. LoCascio,
G. Mahinthakumar,
Jack C. Wells:
Early Evaluation of the SRC-6.
PPSC 1999 |
5 | EE | Tom Dunigan,
Greg Hinkel:
Intrusion Detection and Intrusion Prevention on a Large Network: A Case Study.
Workshop on Intrusion Detection and Network Monitoring 1999: 11-17 |
1998 |
4 | | Timothy J. Sheehan,
William A. Shelton,
Thomas J. Pratt,
Philip M. Papadopoulos,
Philip F. LoCascio,
Thomas H. Dunigan:
The Locally Self-Consistent Multiple Scattering Code in a Geographically Distributed Linked MPP Environment.
Parallel Computing 24(12-13): 1827-1846 (1998) |
1997 |
3 | | Jack Dongarra,
Thomas H. Dunigan:
Message-Passing Performance of Various Computers.
Concurrency - Practice and Experience 9(10): 915-926 (1997) |
1992 |
2 | EE | Thomas H. Dunigan:
Hypercube clock synchronization.
Concurrency - Practice and Experience 4(3): 257-268 (1992) |
1991 |
1 | | Thomas H. Dunigan:
Performance of the Intel iPSC/860 and Ncube 6400 hypercubes.
Parallel Computing 17(10-11): 1285-1302 (1991) |