| |
| 2005 | ||
|---|---|---|
| 3 | Xuejun Liang, Jeffrey S. Vetter, Melissa C. Smith, Arthur S. Bland: Balancing FPGA Resource Utilities. ERSA 2005: 156-162 | |
| 2002 | ||
| 2 | EE | Patrick H. Worley, Thomas H. Dunigan, Mark R. Fahey, James B. White III, Arthur S. Bland: Early evaluation of the IBM p690. SC 2002: 1-21 |
| 1999 | ||
| 1 | Patrick H. Worley, Arthur S. Bland, Thomas H. Dunigan, Philip F. LoCascio, G. Mahinthakumar, Jack C. Wells: Early Evaluation of the SRC-6. PPSC 1999 | |
| 1 | Thomas H. Dunigan (Thomas H. Dunigan Jr., Tom Dunigan) | [1] [2] |
| 2 | Mark R. Fahey | [2] |
| 3 | Xuejun Liang | [3] |
| 4 | Philip F. LoCascio | [1] |
| 5 | G. Mahinthakumar | [1] |
| 6 | Melissa C. Smith | [3] |
| 7 | Jeffrey S. Vetter | [3] |
| 8 | Jack C. Wells | [1] |
| 9 | James B. White III | [2] |
| 10 | Patrick H. Worley | [1] [2] |