| |
| 2001 | ||
|---|---|---|
| 1 | EE | Rob A. Rutenbar, Max Baron, Thomas Daniel, Rajeev Jayaraman, Zvi Or-Bach, Jonathan Rose, Carl Sechen: Panel: (When) Will FPGAs Kill ASICs? DAC 2001: 321-322 |
| 1 | Max Baron | [1] |
| 2 | Rajeev Jayaraman | [1] |
| 3 | Zvi Or-Bach | [1] |
| 4 | Jonathan Rose | [1] |
| 5 | Rob A. Rutenbar | [1] |
| 6 | Carl Sechen | [1] |