| |
| 1999 | ||
|---|---|---|
| 2 | EE | J. Joseph Clement, Stefan P. Riege, Radenko Cvijetic, Carl V. Thompson: Methodology for electromigration critical threshold design rule evaluation. IEEE Trans. on CAD of Integrated Circuits and Systems 18(5): 576-581 (1999) |
| 1996 | ||
| 1 | EE | Madhav P. Desai, Radenko Cvijetic, James Jensen: Sizing of Clock Distribution Networks for High Performance CPU Chips. DAC 1996: 389-394 |
| 1 | J. Joseph Clement | [2] |
| 2 | Madhav P. Desai | [1] |
| 3 | James Jensen | [1] |
| 4 | Stefan P. Riege | [2] |
| 5 | Carl V. Thompson | [2] |