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Brian S. Cherkauer

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2004
5EEStefan Rusu, Harry Muljono, Brian S. Cherkauer: Itanium 2 Processor 6M: Higher Frequency and Larger L3 Cache. IEEE Micro 24(2): 10-18 (2004)
1995
4EEBrian S. Cherkauer, Eby G. Friedman: A unified design methodology for CMOS tapered buffers. IEEE Trans. VLSI Syst. 3(1): 99-111 (1995)
1994
3 Brian S. Cherkauer, Eby G. Friedman: Unification of Speed, Power, Area & Reliability in CMOS Tapered Buffer Design. ISCAS 1994: 111-114
2EEBrian S. Cherkauer, Eby G. Friedman: Channel width tapering of serially connected MOSFET's with emphasis on power dissipation. IEEE Trans. VLSI Syst. 2(1): 100-114 (1994)
1993
1 Brian S. Cherkauer, Eby G. Friedman: The Effects of Channel Width Tapering on the Power Dissipation of Serially Connected MOSFETs. ISCAS 1993: 2110-2113

Coauthor Index

1Eby G. Friedman [1] [2] [3] [4]
2Harry Muljono [5]
3Stefan Rusu [5]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)