| 2008 |
|---|
| 11 | EE | Pei-Yin Chen,
Chih-Yuan Lien,
Yi-Ming Lin:
A real-time image denoising chip.
ISCAS 2008: 3390-3393 |
| 2007 |
|---|
| 10 | EE | Pei-Yin Chen,
Yao-Hsien Lai:
A Low-Complexity Interpolation Method for Deinterlacing.
IEICE Transactions 90-D(2): 606-608 (2007) |
| 2006 |
|---|
| 9 | EE | Yi-Ming Lin,
Pei-Yin Chen:
An Efficient Implementation of CAVLC for H.264/AVC.
ICICIC (3) 2006: 601-604 |
| 8 | EE | Pei-Yin Chen,
Yi-Ming Lin:
A Low-Cost CAVLC Encoder.
IEICE Transactions 89-C(12): 1950-1953 (2006) |
| 2004 |
|---|
| 7 | EE | Pei-Yin Chen:
VLSI Implementation for One-Dimensional Multilevel Lifting-Based Wavelet Transform.
IEEE Trans. Computers 53(4): 386-398 (2004) |
| 6 | EE | Pei-Yin Chen:
VLSI Architecture for 2-D 3-Level Lifting-Based Discrete Wavelet Transform.
IEICE Transactions 87-A(1): 275-279 (2004) |
| 2002 |
|---|
| 5 | EE | Pei-Yin Chen:
A fuzzy search block-matching chip for motion estimation.
Integration 32(1-2): 133-147 (2002) |
| 2001 |
|---|
| 4 | | Pei-Yin Chen,
Jer-Min Jou:
An efficient blocking-matching algorithm based on fuzzy reasoning.
IEEE Transactions on Systems, Man, and Cybernetics, Part B 31(2): 253-259 (2001) |
| 2000 |
|---|
| 3 | | Jau-Ling Chen,
Pei-Yin Chen:
A New Search Algorithm for Block Motion Estimation.
IEEE International Conference on Multimedia and Expo (II) 2000: 979-982 |
| 2 | EE | Jer-Min Jou,
Pei-Yin Chen,
Sheng-Fu Yang:
An adaptive fuzzy logic controller: its VLSI architecture and applications.
IEEE Trans. VLSI Syst. 8(1): 52-60 (2000) |
| 1999 |
|---|
| 1 | EE | Jer-Min Jou,
Pei-Yin Chen,
Yeu-Horng Shiau,
Ming-Shiang Liang:
A Scalable Pipelined Architecture for Separable 2-D Discrete Wavelet Transform.
ASP-DAC 1999: 205-208 |
