| 1998 |
|---|
| 6 | EE | Jie Gong,
Chih-Tung Chen,
Kayhan Küçükçakar:
Architectural Rule Checking for High-level Synthesis.
DATE 1998: 949-950 |
| 5 | EE | Kayhan Küçükçakar,
Chih-Tung Chen,
Jie Gong,
Wim Philipsen,
Thomas E. Tkacik:
Matisse: An Architectural Design Tool for Commodity ICs.
IEEE Design & Test of Computers 15(2): 22-33 (1998) |
| 1997 |
|---|
| 4 | EE | Chih-Tung Chen,
Kayhan Küçükçakar:
High-level scheduling model and control synthesis for a broad range of design applications.
ICCAD 1997: 236-243 |
| 3 | | Chih-Tung Chen,
Kayhan Küçükçakar:
An Architectural Power Optimization Case Study using High-level Synthesis.
ICCD 1997: 562-570 |
| 2 | EE | Chih-Tung Chen,
Kayhan Küçükçakar:
A Source-Level Dynamic Analysis Methodology and Tool for High-Level Synthesis.
ISSS 1997: 134-140 |
| 1994 |
|---|
| 1 | EE | Pravil Gupta,
Chih-Tung Chen,
J. C. DeSouza-Batista,
Alice C. Parker:
Experience with Image Compression Chip Design using Unified System Construction Tools.
DAC 1994: 250-256 |
