| 2005 |
|---|
| 2 | EE | Kwang-Jow Gan,
Dong-Shong Liang,
Chung-Chih Hsiao,
Shih-Yu Wang,
Feng-Chang Chiang,
Cher-Shiung Tsai,
Yaw-Hwang Chen,
Shun-Huo Kuo,
Chi-Pin Chen:
Logic Circuit Design Based on MOS-NDR Devices and Circuits Fabricated by CMOS Process.
IWSOC 2005: 392-395 |
| 1 | EE | Dong-Shong Liang,
Kwang-Jow Gan,
Long-Xian Su,
Chi-Pin Chen,
Chung-Chih Hsiao,
Cher-Shiung Tsai,
Yaw-Hwang Chen,
Shih-Yu Wang,
Shun-Huo Kuo,
Feng-Chang Chiang:
Four-Valued Memory Circuit Designed by Multiple-Peak MOS-NDR Devices and Circuits.
IWSOC 2005: 78-81 |
