| |
| 1999 | ||
|---|---|---|
| 3 | EE | Ching-Wei Yeh, Min-Cheng Chang, Yin-Shuin Kang: Algorithms Promoting the Use of Dual Supply Voltages for Power-Driven Designs. ARVLSI 1999: 155-169 |
| 2 | EE | Ching-Wei Yeh, Min-Cheng Chang, Shih-Chieh Chang, Wen-Ben Jone: Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications. DAC 1999: 68-71 |
| 1 | EE | Chingwei Yeh, Min-Cheng Chang, Shih-Chieh Chang, Wen-Ben Jone: Power reduction through iterative gate sizing and voltage scaling. ISCAS (1) 1999: 246-249 |
| 1 | Shih-Chieh Chang | [1] [2] |
| 2 | Wen-Ben Jone | [1] [2] |
| 3 | Yin-Shuin Kang | [3] |
| 4 | Chingwei Yeh (Ching-Wei Yeh) | [1] [2] [3] |