| 2008 |
|---|
| 9 | EE | Ulrich Brenner,
Markus Struzyna,
Jens Vygen:
BonnPlace: Placement of Leading-Edge Chips by Advanced Combinatorial Algorithms.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(9): 1607-1620 (2008) |
| 8 | EE | Ulrich Brenner:
A faster polynomial algorithm for the unbalanced Hitchcock transportation problem.
Oper. Res. Lett. 36(4): 408-413 (2008) |
| 2005 |
|---|
| 7 | EE | Ulrich Brenner,
Markus Struzyna:
Faster and better global placement by a new transportation algorithm.
DAC 2005: 591-596 |
| 2004 |
|---|
| 6 | EE | Ulrich Brenner,
Anna Pauli,
Jens Vygen:
Almost optimum placement legalization by minimum cost flow and dynamic programming.
ISPD 2004: 2-9 |
| 5 | EE | Ulrich Brenner,
Jens Vygen:
Legalizing a placement with minimum total movement.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(12): 1597-1613 (2004) |
| 2003 |
|---|
| 4 | EE | Ulrich Brenner,
André Rohe:
An effective congestion-driven placement framework.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(4): 387-394 (2003) |
| 2002 |
|---|
| 3 | EE | Ulrich Brenner,
André Rohe:
An effective congestion driven placement framework.
ISPD 2002: 6-11 |
| 2001 |
|---|
| 2 | EE | Ulrich Brenner,
Jens Vygen:
Worst-case ratios of networks in the rectilinear plane.
Networks 38(3): 126-139 (2001) |
| 2000 |
|---|
| 1 | EE | Ulrich Brenner,
Jens Vygen:
Faster Optimal Single-Row Placement with Fixed Ordering.
DATE 2000: 117-121 |
