2008 |
27 | EE | Kazuki Nakada,
Jun Igarashi,
Tetsuya Asai,
Katsumi Tateno,
Hatsuo Hayashi,
Yoshitaka Ohtubo,
Tsutomu Miki,
Kiyonori Yoshii:
Stochastic Synchronization and Array-Enhanced Coherence Resonance in a Bio-inspired Chemical Sensor Array.
CSE 2008: 307-312 |
26 | EE | Akira Utagawa,
Tetsuya Asai,
Tetsuya Hirose,
Yoshihito Amemiya:
Noise-Induced Synchronization among Sub-RF CMOS Analog Oscillators for Skew-Free Clock Distribution.
IEICE Transactions 91-A(9): 2475-2481 (2008) |
2007 |
25 | EE | Gessyca Maria Tovar,
Eric Shun Fukuda,
Tetsuya Asai,
Tetsuya Hirose,
Yoshihito Amemiya:
Analog CMOS Circuits Implementing Neural Segmentation Model Based on Symmetric STDP Learning.
ICONIP (2) 2007: 117-126 |
24 | EE | Gessyca Maria Tovar,
Eric Shun Fukuda,
Tetsuya Asai,
Tetsuya Hirose,
Yoshihito Amemiya:
Neuromorphic CMOS Circuits implementing a Novel Neural Segmentation Model based on Symmetric STDP Learning.
IJCNN 2007: 897-901 |
23 | EE | Ken Ueno,
Tetsuya Hirose,
Tetsuya Asai,
Yoshihito Amemiya:
Floating millivolt reference for PTAT current generation in Subthreshold MOS LSIs.
ISCAS 2007: 3748-3751 |
22 | EE | Andrew Kilinga Kikombo,
Takahide Oya,
Tetsuya Asai,
Yoshihito Amemiya:
Discrete Dynamical Systems Consisting of Single-electron Circuits.
I. J. Bifurcation and Chaos 17(10): 3613-3617 (2007) |
21 | EE | Takahide Oya,
Ikuko N. Motoike,
Tetsuya Asai:
Single-electron Circuits Performing Dendritic Pattern Formation with Nature-Inspired Cellular Automata.
I. J. Bifurcation and Chaos 17(10): 3651-3655 (2007) |
20 | EE | Motoyoshi Takahashi,
Tetsuya Asai,
Tetsuya Hirose,
Yoshihito Amemiya:
A CMOS Reaction-diffusion Device Using Minority-Carrier Diffusion in Semiconductors.
I. J. Bifurcation and Chaos 17(5): 1713-1719 (2007) |
19 | EE | Akira Utagawa,
Tetsuya Asai,
Tetsuya Hirose,
Yoshihito Amemiya:
An Inhibitory Neural-Network Circuit Exhibiting Noise Shaping with Subthreshold MOS Neuron Circuits.
IEICE Transactions 90-A(10): 2108-2115 (2007) |
18 | EE | Andrew Adamatzky,
Christof Teuscher,
Tetsuya Asai:
Editorial.
IJPEDS 22(2): 77-78 (2007) |
17 | EE | Kazuki Nakada,
Tetsuya Asai,
Tetsuya Hirose,
Hatsuo Hayashi,
Yoshihito Amemiya:
A subthreshold CMOS circuit for a piecewise linear neuromorphic oscillator with current-mode low-pass filters.
Neurocomputing 71(1-3): 3-12 (2007) |
2006 |
16 | EE | Kazuki Nakada,
Tetsuya Asai,
Hatsuo Hayashi:
Burst Synchronization in Two Pulse-Coupled Resonate-and-Fire Neuron Circuits.
IFIP PPAI 2006: 285-294 |
15 | EE | Tetsuya Asai,
Taishi Kamiya,
Tetsuya Hirose,
Yoshihito Amemiya:
A subthreshold Analog MOS Circuit for Lotka-volterra Chaotic oscillator.
I. J. Bifurcation and Chaos 16(1): 207-212 (2006) |
14 | EE | Ken Ueno,
Tetsuya Hirose,
Tetsuya Asai,
Yoshihito Amemiya:
A CMOS Watchdog Sensor for Certifying the Quality of Various Perishables with a Wider Activation Energy.
IEICE Transactions 89-A(4): 902-907 (2006) |
13 | EE | Kazuki Nakada,
Tetsuya Asai,
Hatsuo Hayashi:
Analog Vlsi Implementation of Resonate-and-fire Neuron.
Int. J. Neural Syst. 16(6): 445-456 (2006) |
2005 |
12 | EE | Kazuki Nakada,
Tetsuya Asai,
Yoshihito Amemiya:
Analog CMOS implementation of a neuromorphic oscillator with current-mode low-pass filters.
ISCAS (3) 2005: 1923-1926 |
11 | EE | Takahide Oya,
Tetsuya Asai,
Yoshihito Amemiya,
Alexandre Schmid,
Yusuf Leblebici:
Single-electron circuit for inhibitory spiking neural network with fault-tolerant architecture.
ISCAS (3) 2005: 2535-2538 |
10 | EE | Tetsuya Asai,
Ben de Lacy Costello,
Andrew Adamatzky:
Silicon Implementation of a Chemical Reaction-diffusion Processor for Computation of Voronoi Diagram.
I. J. Bifurcation and Chaos 15(10): 3307-3320 (2005) |
9 | EE | Takahide Oya,
Alexandre Schmid,
Tetsuya Asai,
Yusuf Leblebici,
Yoshihito Amemiya:
On the fault tolerance of a clustered single-electron neural network for differential enhancement.
IEICE Electronic Express 2(3): 76-80 (2005) |
8 | EE | Tetsuya Hirose,
Toshimasa Matsuoka,
Kenji Taniguchi,
Tetsuya Asai,
Yoshihito Amemiya:
Ultralow-Power Current Reference Circuit with Low Temperature Dependence.
IEICE Transactions 88-C(6): 1142-1147 (2005) |
7 | EE | Tetsuya Asai,
Masayuki Ikebe,
Tetsuya Hirose,
Yoshihito Amemiya:
A quadrilateral-object composer for binary images with reaction-diffusion cellular automata.
Parallel Algorithms Appl. 20(1): 57-67 (2005) |
2004 |
6 | EE | Kazuki Nakada,
Tetsuya Asai,
Yoshihito Amemiya:
An analog CMOS chip implementing a CNN-based locomotion controller for quadruped walking robots.
ISCAS (3) 2004: 1-4 |
5 | EE | Yusuke Kanazawa,
Tetsuya Asai,
Tetsuya Hirose,
Yoshihito Amemiya:
A MOS circuit for bursting neural oscillators with excitable oregonators.
IEICE Electronic Express 1(4): 73-76 (2004) |
4 | EE | Hiroshi Matsubara,
Tetsuya Asai,
Tetsuya Hirose,
Yoshihito Amemiya:
Reaction-diffusion chip implementing excitable lattices with multiple-valued cellular automata.
IEICE Electronic Express 1(9): 248-252 (2004) |
2003 |
3 | EE | Tetsuya Asai,
Yoshihito Amemiya:
Biomorphic Analog Devices based on Reaction-Diffusion Systems.
ISMVL 2003: 197- |
2000 |
2 | EE | Tetsuya Asai,
Masato Koutani,
Yoshihito Amemiya:
An Analog-Digital Hybrid CMOS Circuit for Two-Dimensional Motion Detection with Correlation Neural Networks.
IJCNN (3) 2000: 494-499 |
1999 |
1 | EE | Tetsuya Asai,
Tomoki Fukai,
Shigeru Tanaka:
A subthreshold MOS circuit for the Lotka-Volterra neural network producing the winners-share-all solution.
Neural Networks 12(2): 211-216 (1999) |