| 2008 |
|---|
| 9 | EE | Jarno Vanne,
Eero Aho,
Timo D. Hämäläinen,
Kimmo Kuusilinna:
A Parallel Memory System for Variable Block-Size Motion Estimation Algorithms.
IEEE Trans. Circuits Syst. Video Techn. 18(4): 538-543 (2008) |
| 8 | EE | Eero Aho,
Jarno Vanne,
Timo D. Hämäläinen:
Configurable Data Memory for Multimedia Processing.
Signal Processing Systems 50(2): 231-249 (2008) |
| 2007 |
|---|
| 7 | EE | Eero Aho,
Jarno Vanne,
Timo D. Hämäläinen,
Kimmo Kuusilinna:
Configurable implementation of parallel memory based real-time video downscaler.
Microprocessors and Microsystems 31(5): 283-292 (2007) |
| 2006 |
|---|
| 6 | | Eero Aho,
Jarno Vanne,
Timo D. Hämäläinen:
Parallel Memory Architecture for Arbitrary Stride Accesses.
DDECS 2006: 65-70 |
| 5 | EE | Eero Aho,
Jarno Vanne,
Timo D. Hämäläinen:
Parallel Memory Implementation for Arbitrary Stride Accesses.
ICSAMOS 2006: 1-6 |
| 4 | EE | Jarno Vanne,
Eero Aho,
Timo Hämäläinen,
Kimmo Kuusilinna:
A High-Performance Sum of Absolute Difference Implementation for Motion Estimation.
IEEE Trans. Circuits Syst. Video Techn. 16(7): 876-883 (2006) |
| 2005 |
|---|
| 3 | EE | Eero Aho,
Jarno Vanne,
Kimmo Kuusilinna,
Timo Hämäläinen:
Block-level parallel processing for scaling evenly divisible frames.
ISCAS (2) 2005: 1134-1137 |
| 2 | EE | Eero Aho,
Jarno Vanne,
Kimmo Kuusilinna,
Timo D. Hämäläinen:
Comments on "Winscale: an image-scaling algorithm using an area pixel Model".
IEEE Trans. Circuits Syst. Video Techn. 15(3): 454-455 (2005) |
| 2002 |
|---|
| 1 | EE | Jarno Vanne,
Eero Aho,
Kimmo Kuusilinna,
Timo D. Hämäläinen:
Enhanced Configurable Parallel Memory Architecture.
DSD 2002: 28-37 |
