| 2008 |
|---|
| 13 | EE | Vaclav Mikolasek,
Astrit Ademaj,
Stanislav Racek:
Segmentation of standard ethernet messages in the time-triggered ethernet.
ETFA 2008: 392-399 |
| 2007 |
|---|
| 12 | EE | Marco Serafini,
Neeraj Suri,
Jonny Vinter,
Astrit Ademaj,
Wolfgang Brandstatter,
Fulvio Tagliabo,
Jens Koch:
A Tunable Add-On Diagnostic Protocol for Time-Triggered Systems.
DSN 2007: 164-174 |
| 11 | EE | Klaus Steinhammer,
Astrit Ademaj:
Hardware Implementation of the Time-Triggered Ethernet Controller.
IESS 2007: 325-338 |
| 10 | EE | Jonny Vinter,
Henrik Eriksson,
Astrit Ademaj,
Bernhard Leiner,
Martin Schlager:
Experimental Evaluation of the DECOS Fault-Tolerant Communication Layer.
SAFECOMP 2007: 264-269 |
| 2006 |
|---|
| 9 | | Astrit Ademaj,
Hermann Kopetz,
Petr Grillinger,
Klaus Steinhammer,
Alexander Hanzlik:
Fault-Tolerant Time-Triggered Ethernet Configuration with Star Topology.
ARCS Workshops 2006: 95-105 |
| 8 | EE | Klaus Steinhammer,
Petr Grillinger,
Astrit Ademaj,
Hermann Kopetz:
A time-triggered ethernet (TTE) switch.
DATE 2006: 794-799 |
| 7 | EE | Hermann Kopetz,
Astrit Ademaj,
Alexander Hanzlik:
Combination of clock-state and clock-rate correction in fault-tolerant distributed systems.
Real-Time Systems 33(1-3): 139-173 (2006) |
| 2005 |
|---|
| 6 | EE | Philipp Peti,
Roman Obermaisser,
Astrit Ademaj,
Hermann Kopetz:
A Maintenance-Oriented Fault Model for the DECOS Integrated Diagnostic Architecture.
IPDPS 2005 |
| 5 | EE | Hermann Kopetz,
Astrit Ademaj,
Petr Grillinger,
Klaus Steinhammer:
The Time-Triggered Ethernet (TTE) Design.
ISORC 2005: 22-33 |
| 2004 |
|---|
| 4 | EE | Hermann Kopetz,
Astrit Ademaj,
Alexander Hanzlik:
Integration of Internal and External Clock Synchronization by the Combination of Clock-State and Clock-Rate Correction in Fault-Tolerant Distributed Systems.
RTSS 2004: 415-425 |
| 2003 |
|---|
| 3 | EE | Astrit Ademaj,
Håkan Sivencrona,
Günther Bauer,
Jan Torin:
Evaluation of Fault Handling of the Time-Triggered Architecture with Bus and Star Topology.
DSN 2003: 123- |
| 2002 |
|---|
| 2 | EE | Astrit Ademaj:
A Methodology for Dependability Evaluation of the Time-Triggered Architecture Using Software Implemented Fault Injection.
EDCC 2002: 172-190 |
| 1 | EE | Astrit Ademaj,
Petr Grillinger,
Pavel Herout,
Jan Hlavicka:
Fault Tolerance Evaluation Using Two Software Based Fault Injection Methods.
IOLTW 2002: 21-25 |
