| 1999 |
|---|
| 3 | EE | Joon-Seo Yim,
Chong-Min Kyung:
Reducing Cross-Coupling Among Interconnect Wires in Deep-Submicron Datapath Design.
DAC 1999: 485-490 |
| 2 | EE | Joon-Seo Yim,
Seong-Ok Bae,
Chong-Min Kyung:
A Floorplan-Based Planning Methodology for Power and Clock Distribution in ASICs.
DAC 1999: 766-771 |
| 1997 |
|---|
| 1 | EE | Joon-Seo Yim,
Yoon-Ho Hwang,
Chang-Jae Park,
Hoon Choi,
Woo-Seung Yang,
Hun-Seung Oh,
In-Cheol Park,
Chong-Min Kyung:
A C-Based RTL Design Verification Methodology for Complex Microprocessor.
DAC 1997: 83-88 |
