Ender Yilmaz

List of publications from the DBLP Bibliography Server - FAQ

2009

2 EE Ender Yilmaz, Günhan Dündar: Analog Layout Generator for CMOS Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 32-45 (2009)

2008

1 EE Ender Yilmaz, Sule Ozev: Dynamic test scheduling for analog circuits for improved test quality. ICCD 2008: 227-233

2009
2	EE	Ender Yilmaz, Günhan Dündar: Analog Layout Generator for CMOS Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 32-45 (2009)
2008
1	EE	Ender Yilmaz, Sule Ozev: Dynamic test scheduling for analog circuits for improved test quality. ICCD 2008: 227-233

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