| 2009 |
|---|
| 4 | EE | Jason Luu,
Ian Kuon,
Peter Jamieson,
Ted Campbell,
Andy Ye,
Wei Mark Fang,
Jonathan Rose:
VPR 5.0: FPGA cad and architecture exploration tools with single-driver routing, heterogeneity and process scaling.
FPGA 2009: 133-142 |
| 2008 |
|---|
| 3 | EE | Ping Chen,
Andy Ye:
The effect of sparse switch patterns on the area efficiency of multi-bit routing resources in field-programmable gate arrays.
FPL 2008: 427-430 |
| 2 | EE | Theepan Moorthy,
Andy Ye:
A scalable computing and memory architecture for variable block size motion estimation on Field-Programmable Gate Arrays.
FPL 2008: 83-88 |
| 2006 |
|---|
| 1 | EE | Andy Ye,
Jonathan Rose:
Using Bus-Based Connections to Improve Field-Programmable Gate-Array Density for Implementing Datapath Circuits.
IEEE Trans. VLSI Syst. 14(5): 462-473 (2006) |
