2004 | ||
---|---|---|
2 | Meng-Da Yang, An-Yeu Wu, Jyh-Ting Lai: High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme. IEEE Trans. VLSI Syst. 12(2): 218-226 (2004) | |
2002 | ||
1 | EE | Meng-Da Yang, An-Yeu Wu: A new pipelined adaptive DFE architecture with improved convergence rate. ISCAS (4) 2002: 213-216 |
1 | Jyh-Ting Lai | [2] |
2 | An-Yeu Wu | [1] [2] |