dblp.uni-trier.dewww.uni-trier.de

Yasue Yamamoto

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2007
2EEYasue Yamamoto, Masanori Shirahama, Toshiaki Kawasaki, Ryuji Nishihara, Shinichi Sumi, Yasuhiro Agata, Hirohito Kikukawa, Hiroyuki Yamauchi: A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory Cell Design with a Differential Cell Architecture in a Pure CMOS Logic Process for a System LSI. IEICE Transactions 90-C(5): 1129-1137 (2007)
2006
1EEYasue Yamamoto, Takeshi Hidaka, Hiroki Nakamura, Hiroshi Sakuraba, Fujio Masuoka: Decananometer Surrounding Gate Transistor (SGT) Scalability by Using an Intrinsically-Doped Body and Gate Work Function Engineering. IEICE Transactions 89-C(4): 560-567 (2006)

Coauthor Index

1Yasuhiro Agata [2]
2Takeshi Hidaka [1]
3Toshiaki Kawasaki [2]
4Hirohito Kikukawa [2]
5Fujio Masuoka [1]
6Hiroki Nakamura [1]
7Ryuji Nishihara [2]
8Hiroshi Sakuraba [1]
9Masanori Shirahama [2]
10Shinichi Sumi [2]
11Hiroyuki Yamauchi [2]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)