| |
| 2006 | ||
|---|---|---|
| 2 | EE | Yasue Yamamoto, Takeshi Hidaka, Hiroki Nakamura, Hiroshi Sakuraba, Fujio Masuoka: Decananometer Surrounding Gate Transistor (SGT) Scalability by Using an Intrinsically-Doped Body and Gate Work Function Engineering. IEICE Transactions 89-C(4): 560-567 (2006) |
| 2001 | ||
| 1 | EE | Kazuhisa Sunaga, Tetsuo Endoh, Hiroshi Sakuraba, Fujio Masuoka: An on-chip 96.5% current efficiency CMOS linear regulator. ASP-DAC 2001: 297-301 |
| 1 | Tetsuo Endoh | [1] |
| 2 | Takeshi Hidaka | [2] |
| 3 | Hiroki Nakamura | [2] |
| 4 | Hiroshi Sakuraba | [1] [2] |
| 5 | Kazuhisa Sunaga | [1] |
| 6 | Yasue Yamamoto | [2] |