| 2008 |
|---|
| 10 | EE | Zhenghong Wang,
Ruby B. Lee:
A novel cache architecture with enhanced performance and security.
MICRO 2008: 83-93 |
| 2007 |
|---|
| 9 | EE | Zhenghong Wang,
Jing Deng,
Ruby B. Lee:
Mutual Anonymous Communications: A New Covert Channel Based on Splitting Tree MAC.
INFOCOM 2007: 2531-2535 |
| 8 | EE | Zhenghong Wang,
Ruby B. Lee:
New cache designs for thwarting software cache-based side channel attacks.
ISCA 2007: 494-505 |
| 2006 |
|---|
| 7 | EE | Zhenghong Wang,
Ruby B. Lee:
Covert and Side Channels Due to Processor Architecture.
ACSAC 2006: 473-482 |
| 6 | EE | Michael Neve,
Jean-Pierre Seifert,
Zhenghong Wang:
A refined look at Bernstein's AES side-channel analysis.
ASIACCS 2006: 369 |
| 2005 |
|---|
| 5 | EE | Zhenghong Wang,
Ruby B. Lee:
Capacity Estimation of Non-Synchronous Covert Channels.
ICDCS Workshops 2005: 170-176 |
| 4 | EE | Zhenghong Wang,
Ruby B. Lee:
New Constructive Approach to Covert Channel Modeling and Channel Capacity Estimation.
ISC 2005: 498-505 |
| 3 | EE | Ruby B. Lee,
Peter C. S. Kwan,
John Patrick McGregor,
Jeffrey S. Dwoskin,
Zhenghong Wang:
Architecture for Protecting Critical Secrets in Microprocessors.
ISCA 2005: 2-13 |
| 2003 |
|---|
| 2 | EE | Zhenghong Wang,
Xieting Ling,
Bo Hu:
A low-complexity low-distortion topology for wideband delta-sigma ADCs.
ISCAS (1) 2003: 937-940 |
| 2001 |
|---|
| 1 | EE | Zhenghong Wang,
Xieting Ling:
Noise-reducing loop in multi-bit Sigma-Delta modulators.
ISCAS (1) 2001: 284-287 |
