Jen-Chuan Wang
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1995
1
EE
Shyue-Kung Lu
, Jen-Chuan Wang,
Cheng-Wen Wu
: C-testable design techniques for iterative logic arrays.
IEEE Trans. VLSI Syst. 3
(1): 146-152 (1995)
Coauthor
Index
1
Shyue-Kung Lu
[
1
]
2
Cheng-Wen Wu
[
1
]
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Sun May 17 03:24:02 2009 by
Michael Ley
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ley@uni-trier.de
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