| 1995 |
|---|
| 5 | EE | Hui Min Wang,
Chung-Len Lee,
Jwu E. Chen:
Factorization of Multi-Valued Logic Functions.
ISMVL 1995: 164-169 |
| 4 | EE | Chung-Len Lee,
Horng Nan Chern,
Min Shung Liao,
Hui Min Wang:
On Designing of 4-Valued Memory with Double-Gate TFT.
ISMVL 1995: 187- |
| 1994 |
|---|
| 3 | | Hui Min Wang,
Chung-Len Lee,
Jwu E. Chen:
Complete Test Set for Multiple-Valued Logic Networks.
ISMVL 1994: 289-296 |
| 2 | | Hui Min Wang,
Chung-Len Lee,
Jwu E. Chen:
Algebraic Division for Multilevel Logic Synthesis of Multi-Valued Logic Circuits.
ISMVL 1994: 44-51 |
| 1992 |
|---|
| 1 | | Hui Min Wang,
Chung-Len Lee,
Jwu E. Chen:
Fault Analysis on Two-Level (K+1)-Valued Logic Circuits.
ISMVL 1992: 181-188 |
