| 1998 |
|---|
| 6 | EE | Luca Benini,
Patrick Vuillod,
Giovanni De Micheli:
Iterative remapping for logic circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(10): 948-964 (1998) |
| 1997 |
|---|
| 5 | EE | Patrick Vuillod,
Luca Benini,
Giovanni De Micheli:
Generalized matching from theory to application.
ICCAD 1997: 13-20 |
| 4 | EE | Patrick Vuillod,
Luca Benini,
Giovanni De Micheli:
Re-mapping for low power under tight timing constraints.
ISLPED 1997: 287-292 |
| 3 | EE | Luca Benini,
Patrick Vuillod,
Alessandro Bogliolo,
Giovanni De Micheli:
Clock Skew Optimization for Peak Current Reduction.
VLSI Signal Processing 16(2-3): 117-130 (1997) |
| 1996 |
|---|
| 2 | EE | Patrick Vuillod,
Luca Benini,
Alessandro Bogliolo,
Giovanni De Micheli:
Clock skew optimization for peak current reduction.
ISLPED 1996: 265-270 |
| 1 | EE | Luca Benini,
Patrick Vuillod,
Claudionor José Nunes Coelho Jr.,
Giovanni De Micheli:
Synthesis of Low-Power Selectively-Clocked Systems from High-Level Specification.
ISSS 1996: 57- |
