K. N. Vikram

2006
3	EE	K. N. Vikram, V. Vasudevan: Scheduling divisible loads on partially reconfigurable hardware. FCCM 2006: 289-290
2	EE	K. N. Vikram, V. Vasudevan: Mapping Data-Parallel Tasks Onto Partially Reconfigurable Hybrid Processor Architectures. IEEE Trans. VLSI Syst. 14(9): 1010-1023 (2006)
2005
1	EE	K. N. Vikram, V. Vasudevan: Hardware-software co-simulation of bus-based reconfigurable systems. Microprocessors and Microsystems 29(4): 133-144 (2005)

Coauthor Index

1

V. Vasudevan

[1] [2] [3]