| |
| 2006 | ||
|---|---|---|
| 2 | Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia: A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs. CDES 2006: 36-38 | |
| 2003 | ||
| 1 | Vishal Verma, Himanshu Thapliyal: A High Speed Efficient N x N Bit Multiplier Based on Ancient Indian Vedic Mathematics. VLSI 2003: 361-365 | |
| 1 | Hamid R. Arabnia | [2] |
| 2 | Himanshu Thapliyal | [1] [2] |