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Ramakrishna Velagapudi

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2006
4EESaraju P. Mohanty, Ramakrishna Velagapudi, Elias Kougianos: Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits. DATE 2006: 1191-1196
3EESaraju P. Mohanty, Elias Kougianos, Ramakrishna Velagapudi, Valmiki Mukherjee: Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis. ISCAS 2006
2EESaraju P. Mohanty, Ramakrishna Velagapudi, Elias Kougianos: Dual-K Versus Dual-T Technique for Gate Leakage Reduction : A Comparative Perspective. ISQED 2006: 564-569
2005
1EESaraju P. Mohanty, Ramakrishna Velagapudi, Valmiki Mukherjee, Hao Li: Reduction of Direct Tunneling Power Dissipation during Behavioral Synthesis of Nanometer CMOS Circuits. ISVLSI 2005: 248-249

Coauthor Index

1Elias Kougianos [2] [3] [4]
2Hao Li [1]
3Saraju P. Mohanty [1] [2] [3] [4]
4Valmiki Mukherjee [1] [3]

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