| 2006 |
|---|
| 4 | EE | Saraju P. Mohanty,
Ramakrishna Velagapudi,
Elias Kougianos:
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits.
DATE 2006: 1191-1196 |
| 3 | EE | Saraju P. Mohanty,
Elias Kougianos,
Ramakrishna Velagapudi,
Valmiki Mukherjee:
Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis.
ISCAS 2006 |
| 2 | EE | Saraju P. Mohanty,
Ramakrishna Velagapudi,
Elias Kougianos:
Dual-K Versus Dual-T Technique for Gate Leakage Reduction : A Comparative Perspective.
ISQED 2006: 564-569 |
| 2005 |
|---|
| 1 | EE | Saraju P. Mohanty,
Ramakrishna Velagapudi,
Valmiki Mukherjee,
Hao Li:
Reduction of Direct Tunneling Power Dissipation during Behavioral Synthesis of Nanometer CMOS Circuits.
ISVLSI 2005: 248-249 |
