2008 |
66 | EE | Georgeta Igna,
Venkatesh Kannan,
Yang Yang,
Twan Basten,
Marc Geilen,
Frits W. Vaandrager,
Marc Voorhoeve,
Sebastian de Smet,
Lou J. Somers:
Formal Modeling and Scheduling of Datapaths of Digital Document Printers.
FORMATS 2008: 170-187 |
65 | EE | Jasper Berendsen,
Frits W. Vaandrager:
Compositional Abstraction in Real-Time Model Checking.
FORMATS 2008: 233-249 |
2007 |
64 | EE | Ling Cheung,
Mariëlle Stoelinga,
Frits W. Vaandrager:
A testing scenario for probabilistic processes.
J. ACM 54(6): (2007) |
63 | EE | Nancy A. Lynch,
Roberto Segala,
Frits W. Vaandrager:
Observing Branching Structure through Probabilistic Contexts.
SIAM J. Comput. 37(4): 977-1013 (2007) |
2006 |
62 | EE | Biniam Gebremichael,
Frits W. Vaandrager,
Miaomiao Zhang:
Analysis of the zeroconf protocol using UPPAAL.
EMSOFT 2006: 242-251 |
61 | EE | Frits W. Vaandrager,
Adriaan de Groot:
Analysis of a biphase mark protocol with Uppaaland PVS.
Formal Asp. Comput. 18(4): 433-458 (2006) |
60 | EE | Martijn Hendriks,
Barend van den Nieuwelaar,
Frits W. Vaandrager:
Model checker aided design of a controller for a wafer scanner.
STTT 8(6): 633-647 (2006) |
59 | EE | Ling Cheung,
Nancy A. Lynch,
Roberto Segala,
Frits W. Vaandrager:
Switched PIOA: Parallel composition via distributed scheduling.
Theor. Comput. Sci. 365(1-2): 83-108 (2006) |
2005 |
58 | EE | Biniam Gebremichael,
Frits W. Vaandrager,
Miaomiao Zhang,
Kees Goossens,
Edwin Rijpkema,
Andrei Radulescu:
Deadlock Prevention in the Æthereal Protocol.
CHARME 2005: 345-348 |
57 | EE | Biniam Gebremichael,
Frits W. Vaandrager:
Specifying Urgency in Timed I/O Automata.
SEFM 2005: 64-74 |
2004 |
56 | EE | Ling Cheung,
Nancy A. Lynch,
Roberto Segala,
Frits W. Vaandrager:
Switched Probabilistic I/O Automata.
ICTAC 2004: 494-510 |
55 | | Martijn Hendriks,
Barend van den Nieuwelaar,
Frits W. Vaandrager:
Model Checker Aided Design of a Controller for a Wafer Scanner.
ISoLA (Preliminary proceedings) 2004: 201-208 |
54 | EE | W. O. David Griffioen,
Frits W. Vaandrager:
A theory of normed simulations.
ACM Trans. Comput. Log. 5(4): 577-610 (2004) |
2003 |
53 | EE | Nancy A. Lynch,
Roberto Segala,
Frits W. Vaandrager:
Compositionality for Probabilistic Automata.
CONCUR 2003: 204-222 |
52 | EE | Rob J. van Glabbeek,
Frits W. Vaandrager:
Bundle Event Structures and CCSP.
CONCUR 2003: 57-71 |
51 | EE | Henrik C. Bohnenkamp,
Peter van der Stok,
Holger Hermanns,
Frits W. Vaandrager:
Cost-Optimization of the IPv4 Zeroconf Protocol.
DSN 2003: 531-540 |
50 | EE | Biniam Gebremichael,
Frits W. Vaandrager:
Control Synthesis for a Smart Card Personalization System Using Symbolic Model Checking.
FORMATS 2003: 189-203 |
49 | EE | Martijn Hendriks,
Gerd Behrmann,
Kim Guldstrand Larsen,
Peter Niebert,
Frits W. Vaandrager:
Adding Symmetry Reduction to Uppaal.
FORMATS 2003: 46-59 |
48 | EE | Mariëlle Stoelinga,
Frits W. Vaandrager:
A Testing Scenario for Probabilistic Automata.
ICALP 2003: 464-477 |
47 | EE | Ansgar Fehnker,
Frits W. Vaandrager,
Miaomiao Zhang:
Modeling and Verifying a Lego Car Using Hybrid I/O Automata.
QSIC 2003: 280-289 |
46 | EE | Dilsun Kirli Kaynar,
Nancy A. Lynch,
Roberto Segala,
Frits W. Vaandrager:
Timed I/O Automata: A Mathematical Framework for Modeling and Analyzing Real-Time Systems.
RTSS 2003: 166-177 |
45 | EE | Nancy A. Lynch,
Roberto Segala,
Frits W. Vaandrager:
Hybrid I/O automata.
Inf. Comput. 185(1): 105-157 (2003) |
2002 |
44 | EE | Thomas Hune,
Judi Romijn,
Mariëlle Stoelinga,
Frits W. Vaandrager:
Linear parametric model checking of timed automata.
J. Log. Algebr. Program. 52-53: 183-220 (2002) |
2001 |
43 | EE | Gerd Behrmann,
Ansgar Fehnker,
Thomas Hune,
Kim Guldstrand Larsen,
Paul Pettersson,
Judi Romijn,
Frits W. Vaandrager:
Minimum-Cost Reachability for Priced Timed Automata.
HSCC 2001: 147-161 |
42 | EE | Nancy A. Lynch,
Roberto Segala,
Frits W. Vaandrager:
Hybrid I/O Automata Revisited.
HSCC 2001: 403-417 |
41 | EE | Thomas Hune,
Judi Romijn,
Mariëlle Stoelinga,
Frits W. Vaandrager:
Linear Parametric Model Checking of Timed Automata.
TACAS 2001: 189-203 |
40 | EE | Jan Springintveld,
Frits W. Vaandrager,
Pedro R. D'Argenio:
Testing timed automata.
Theor. Comput. Sci. 254(1-2): 225-257 (2001) |
2000 |
39 | | Gerd Behrmann,
Thomas Hune,
Frits W. Vaandrager:
Distributing Timed Model Checking - How the Search Order Matters.
CAV 2000: 216-231 |
38 | EE | W. O. David Griffioen,
Frits W. Vaandrager:
A theory of normed simulations
CoRR cs.LO/0007030: (2000) |
37 | | Marco Devillers,
W. O. David Griffioen,
Judi Romijn,
Frits W. Vaandrager:
Verification of a Leader Election Protocol: Formal Methods Applied to IEEE 1394.
Formal Methods in System Design 16(3): 307-320 (2000) |
1999 |
36 | | Frits W. Vaandrager,
Jan H. van Schuppen:
Hybrid Systems: Computation and Control, Second International Workshop, HSCC'99, Berg en Dal, The Netherlands, March 29-31, 1999, Proceedings
Springer 1999 |
35 | EE | Frits W. Vaandrager:
Verification of Hybrid Systems (abstract).
ARTS 1999: 151 |
34 | EE | Mariëlle Stoelinga,
Frits W. Vaandrager:
Root Contention in IEEE 1394.
ARTS 1999: 53-74 |
1998 |
33 | | Grzegorz Rozenberg,
Frits W. Vaandrager:
Lectures on Embedded Systems, European Educational Forum, School on Embedded Systems, Veldhoven, The Netherlands, November 25-29, 1996
Springer 1998 |
32 | | W. O. David Griffioen,
Frits W. Vaandrager:
Normed Simulations.
CAV 1998: 332-344 |
31 | EE | Henning Dierks,
Ansgar Fehnker,
Angelika Mader,
Frits W. Vaandrager:
Operational and Logical Semantics for Polling Real-Time Systems.
FTRTFT 1998: 29-40 |
1997 |
30 | | Frits W. Vaandrager:
A Theory of Testing for Timed Automata (Abstract).
TAPSOFT 1997: 39 |
29 | | Rob J. van Glabbeek,
Frits W. Vaandrager:
The Difference between Splitting in n and n+1.
Inf. Comput. 136(2): 109-142 (1997) |
1996 |
28 | | Frits W. Vaandrager:
Introduction.
European Educational Forum: School on Embedded Systems 1996: 1-3 |
27 | | Jan Springintveld,
Frits W. Vaandrager:
Minimizable Timed Automata.
FTRTFT 1996: 130-147 |
26 | | Nancy A. Lynch,
Frits W. Vaandrager:
Action Transducers and Timed Automata.
Formal Asp. Comput. 8(5): 499-538 (1996) |
25 | | Nancy A. Lynch,
Frits W. Vaandrager:
Forward and Backward Simulations, II: Timing-Based Systems.
Inf. Comput. 128(1): 1-25 (1996) |
24 | EE | Judi Romijn,
Frits W. Vaandrager:
A Note on Fairness in I/O Automata.
Inf. Process. Lett. 59(5): 245-250 (1996) |
1995 |
23 | | Frits W. Vaandrager:
Verification of a Distributed Summation Algorithm.
CONCUR 1995: 190-203 |
22 | | Nancy A. Lynch,
Roberto Segala,
Frits W. Vaandrager,
Henri B. Weinberg:
Hybrid I/O Automata.
Hybrid Systems 1995: 496-510 |
21 | | Nancy A. Lynch,
Frits W. Vaandrager:
Forward and Backward Simulations: I. Untimed Systems
Inf. Comput. 121(2): 214-233 (1995) |
20 | EE | Rocco De Nicola,
Frits W. Vaandrager:
Three Logics for Branching Bisimulation.
J. ACM 42(2): 458-487 (1995) |
1994 |
19 | | Doeko Bosscher,
Indra Polak,
Frits W. Vaandrager:
Verification of an Audio Control Protocol.
FTRTFT 1994: 170-192 |
18 | | Luca Aceto,
Bard Bloom,
Frits W. Vaandrager:
Turning SOS Rules into Equations
Inf. Comput. 111(1): 1-52 (1994) |
1993 |
17 | | Leen Helmink,
M. P. A. Sellink,
Frits W. Vaandrager:
Proof-Checking a Data Link Protocol.
TYPES 1993: 127-165 |
16 | | Rob J. van Glabbeek,
Frits W. Vaandrager:
Modular Specification of Process Algebras.
Theor. Comput. Sci. 113(2): 293-348 (1993) |
1992 |
15 | | Frits W. Vaandrager,
Nancy A. Lynch:
Action Transducers and Timed Automata.
CONCUR 1992: 436-455 |
14 | | Luca Aceto,
Bard Bloom,
Frits W. Vaandrager:
Turning SOS Rules into Equations
LICS 1992: 113-124 |
13 | | Frits W. Vaandrager:
Expressive Results for Process Algebras.
REX Workshop 1992: 609-638 |
12 | | Jos C. M. Baeten,
Frits W. Vaandrager:
An Algebra for Process Creation.
Acta Inf. 29(4): 303-334 (1992) |
11 | | Jan Friso Groote,
Frits W. Vaandrager:
Structured Operational Semantics and Bisimulation as a Congruence
Inf. Comput. 100(2): 202-260 (1992) |
1991 |
10 | | Frits W. Vaandrager:
On the Relationship Between Process Algebra and Input/Output Automata
LICS 1991: 387-398 |
9 | | Nancy A. Lynch,
Frits W. Vaandrager:
Forward and Backward Simulations for Timing-Based Systems.
REX Workshop 1991: 397-446 |
8 | | Frits W. Vaandrager:
Determinism - (Event Structure Isomorphism = Step Sequence Equivalence).
Theor. Comput. Sci. 79(2): 275-294 (1991) |
1990 |
7 | | Rocco De Nicola,
Ugo Montanari,
Frits W. Vaandrager:
Back and Forth Bisimulations.
CONCUR 1990: 152-165 |
6 | | Jan Friso Groote,
Frits W. Vaandrager:
An Efficient Algorithm for Branching Bisimulation and Stuttering Equivalence.
ICALP 1990: 626-638 |
5 | | Rocco De Nicola,
Frits W. Vaandrager:
Three Logics for Branching Bisimulation (Extended Abstract)
LICS 1990: 118-129 |
4 | | Rocco De Nicola,
Frits W. Vaandrager:
Action versus State based Logics for Transition Systems.
Semantics of Systems of Concurrent Processes 1990: 407-419 |
1989 |
3 | | Jan Friso Groote,
Frits W. Vaandrager:
Structural Operational Semantics and Bisimulation as a Congruence (Extended Abstract).
ICALP 1989: 423-438 |
1987 |
2 | | Rob J. van Glabbeek,
Frits W. Vaandrager:
Modular Specifications in Process Algebra with Curious Queues.
Algebraic Methods 1987: 465-506 |
1 | | Rob J. van Glabbeek,
Frits W. Vaandrager:
Petri Net Models for Algebraic Theories of Concurrency.
PARLE (2) 1987: 224-242 |