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Ken'ichiro Uda

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2000
1EEHirofumi Sakamoto, Ken'ichiro Uda, Bu-Y. Lee, Hiroyuki Ochi, Kazuo Taki, Takao Tsuda: A 16-bit redundant binary multiplier using low-power pass-transistor logic SPL. ASP-DAC 2000: 33-34

Coauthor Index

1Bu-Y. Lee [1]
2Hiroyuki Ochi [1]
3Hirofumi Sakamoto [1]
4Kazuo Taki [1]
5Takao Tsuda [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)