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Bu-Y. Lee

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2000
1EEHirofumi Sakamoto, Ken'ichiro Uda, Bu-Y. Lee, Hiroyuki Ochi, Kazuo Taki, Takao Tsuda: A 16-bit redundant binary multiplier using low-power pass-transistor logic SPL. ASP-DAC 2000: 33-34

Coauthor Index

1Hiroyuki Ochi [1]
2Hirofumi Sakamoto [1]
3Kazuo Taki [1]
4Takao Tsuda [1]
5Ken'ichiro Uda [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)