| 2009 |
|---|
| 10 | EE | Swapna R. Dontharaju,
Shen Chih Tung,
James T. Cain,
Leonid Mats,
Marlin H. Mickle,
Alex K. Jones:
A design automation and power estimation flow for RFID systems.
ACM Trans. Design Autom. Electr. Syst. 14(1): (2009) |
| 2008 |
|---|
| 9 | EE | Shen Chih Tung,
Alex K. Jones:
Physical layer design automation for RFID systems.
IPDPS 2008: 1-8 |
| 8 | EE | Alex K. Jones,
Swapna R. Dontharaju,
Shen Chih Tung,
Leonid Mats,
Peter J. Hawrylak,
Raymond R. Hoare,
James T. Cain,
Marlin H. Mickle:
Radio frequency identification prototyping.
ACM Trans. Design Autom. Electr. Syst. 13(2): (2008) |
| 2007 |
|---|
| 7 | EE | Alex K. Jones,
Raymond Hoare,
Swapna R. Dontharaju,
Shen Chih Tung,
Ralph Sprang,
Joshua Fazekas,
James T. Cain,
Marlin H. Mickle:
An automated, FPGA-based reconfigurable, low-power RFID tag.
Microprocessors and Microsystems 31(2): 116-134 (2007) |
| 2006 |
|---|
| 6 | EE | Alex K. Jones,
Raymond R. Hoare,
Swapna R. Dontharaju,
Shen Chih Tung,
Ralph Sprang,
Joshua Fazekas,
James T. Cain,
Marlin H. Mickle:
An automated, reconfigurable, low-power RFID tag.
DAC 2006: 131-136 |
| 5 | EE | Alex K. Jones,
Raymond R. Hoare,
Swapna R. Dontharaju,
Shen Chih Tung,
Ralph Sprang,
Joshua Fazekas,
James T. Cain,
Marlin H. Mickle:
A Field Programmable RFID Tag and Associated Design Flow.
FCCM 2006: 165-174 |
| 4 | EE | Alex K. Jones,
Swapna R. Dontharaju,
Shen Chih Tung,
Peter J. Hawrylak,
Leonid Mats,
Raymond R. Hoare,
James T. Cain,
Marlin H. Mickle:
Passive active radio frequency identification tags.
IJRFITA 1(1): 52-73 (2006) |
| 2005 |
|---|
| 3 | EE | Raymond R. Hoare,
Zhu Ding,
Shen Chih Tung,
Rami G. Melhem,
Alex K. Jones:
A framework for the design, synthesis and cycle-accurate simulation of multiprocessor networks.
J. Parallel Distrib. Comput. 65(10): 1237-1252 (2005) |
| 2004 |
|---|
| 2 | EE | Raymond Hoare,
Shen Chih Tung,
Katrina Werger:
An 88-Way Multiprocessor within an FPGA with Customizable Instructions.
IPDPS 2004 |
| 2003 |
|---|
| 1 | EE | Raymond Hoare,
Shen Chih Tung:
Combining Mentor Graphics? HDL Designer FPGA Flow with a Reconfigurable System on a Programmable Chip, Educational Opportunity or Insanity?
MSE 2003: 128-130 |
