| |
| 2004 | ||
|---|---|---|
| 1 | Norito Kato, Masanori Yamato, Osamu Tujimoto, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Mitaro Namiki, Hironori Nakajo: Dynamic Allocation of Physical Register Banks for an SMT Processor. PDPTA 2004: 317-323 | |
| 1 | Norito Kato | [1] |
| 2 | Hironori Nakajo | [1] |
| 3 | Mitaro Namiki | [1] |
| 4 | Koichi Sasada | [1] |
| 5 | Mikiko Sato | [1] |
| 6 | Kaname Uchikura | [1] |
| 7 | Masanori Yamato | [1] |