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1999 | ||
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2 | EE | X. Zeng, J. Guan, W. Q. Zhao, P. S. Tang, D. Zhou: A constraint-based placement refinement method for CMOS analog cell layout. ISCAS (6) 1999: 408-411 |
1998 | ||
1 | X. Zeng, P. S. Tang, C. K. Tse: Design of Nonlinear Switched-Current Circuits Using Building Block Approach. ASP-DAC 1998: 409-414 |
1 | J. Guan | [2] |
2 | C. K. Michael Tse (Chi K. Michael Tse, C. K. Tse, Chi Kong Tse) | [1] |
3 | X. Zeng | [1] [2] |
4 | W. Q. Zhao | [2] |
5 | D. Zhou | [2] |