Kesava R. Talupuru

2008
2	EE	Kyuho Shim, Kesava R. Talupuru, Maciej J. Ciesielski, Seiyang Yang: Simulation Acceleration with HW Re-Compilation Avoidance. VLSI Design 2008: 487-491
2005
1	EE	Zhihong Zeng, Kesava R. Talupuru, Maciej J. Ciesielski: Functional test generation based on word-level SAT. Journal of Systems Architecture 51(8): 488-511 (2005)

Coauthor Index

1	Maciej J. Ciesielski	[1] [2]
2	Kyuho Shim	[2]
3	Seiyang Yang	[2]
4	Zhihong Zeng	[1]