| |
| 1998 | ||
|---|---|---|
| 5 | EE | Luca Benini, Robin Hodgson, Polly Siegel: System-level power estimation and optimization. ISLPED 1998: 173-178 |
| 1994 | ||
| 4 | EE | Polly Siegel, Giovanni De Micheli: Decomposition methods for library binding of speed-independent asynchronous designs. ICCAD 1994: 558-565 |
| 3 | EE | Alan Marshall, Bill Coates, Polly Siegel: Designing an Asynchronous Communications Chip. IEEE Design & Test of Computers 11(2): 8-21 (1994) |
| 2 | EE | Luca Benini, Polly Siegel, Giovanni De Micheli: Saving Power by Synthesizing Gated Clocks for Sequential Circuits. IEEE Design & Test of Computers 11(4): 32-41 (1994) |
| 1993 | ||
| 1 | EE | Polly Siegel, Giovanni De Micheli, David L. Dill: Automatic Technology Mapping for Generalized Fundamental-Mode Asynchronous Designs. DAC 1993: 61-67 |
| 1 | Luca Benini | [2] [5] |
| 2 | Bill Coates | [3] |
| 3 | David L. Dill | [1] |
| 4 | Robin Hodgson | [5] |
| 5 | Alan Marshall | [3] |
| 6 | Giovanni De Micheli | [1] [2] [4] |