| |
| 2001 | ||
|---|---|---|
| 3 | Takahiro Hanyu, Michitaka Kameyama, Katsuhiko Shimabukuro, C. Zukeran: Multiple-Valued Mask-Programmable Logic Array Using One-Transistor Universal-Literal Circuits. ISMVL 2001: 167-172 | |
| 1998 | ||
| 2 | EE | Katsuhiko Shimabukuro, C. Zukeran: Reconfigurable Current-Mode Multiple-Valued Residue Arithmetic Circuits. ISMVL 1998: 282- |
| 1992 | ||
| 1 | Katsuhiko Shimabukuro, Michitaka Kameyama, Tatsuo Higuchi: Design of a Multiple-Valued VLSI Processor for Digital Control. ISMVL 1992: 322-329 | |
| 1 | Takahiro Hanyu | [3] |
| 2 | Tatsuo Higuchi | [1] |
| 3 | Michitaka Kameyama | [1] [3] |
| 4 | C. Zukeran | [2] [3] |