| |
| 1999 | ||
|---|---|---|
| 1 | EE | Che-Han Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu, Jia-Lin Sheu: A VLSI architecture of fast high-radix modular multiplication for RSA cryptosystem. ISCAS (1) 1999: 500-503 |
| 1 | Ming-Hwa Sheu | [1] |
| 2 | Ming-Der Shieh | [1] |
| 3 | Che-Han Wu | [1] |
| 4 | Chien-Hsing Wu | [1] |