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Jia-Lin Sheu

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1999
1EEChe-Han Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu, Jia-Lin Sheu: A VLSI architecture of fast high-radix modular multiplication for RSA cryptosystem. ISCAS (1) 1999: 500-503

Coauthor Index

1Ming-Hwa Sheu [1]
2Ming-Der Shieh [1]
3Che-Han Wu [1]
4Chien-Hsing Wu [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)