1997 | ||
---|---|---|
2 | EE | A. Bertolet, K. Carpenter, Keith M. Carrig, Albert M. Chu, A. Dean, Frank D. Ferraiolo, S. Kenyon, D. Phan, John G. Petrovick, G. Rodgers, D. Willmott, T. Bairley, T. Decker, V. Girardi, Y. Lapid, M. Murphy, P. Andrew Scott, Richard J. Weiss: A pseudo-hierarchical methodology for high performance microprocessor design. ISPD 1997: 124-129 |
1 | EE | Keith M. Carrig, Albert M. Chu, Frank D. Ferraiolo, John G. Petrovick, P. Andrew Scott, Richard J. Weiss: A Clock Methodology for High-Performance Microprocessors. VLSI Signal Processing 16(2-3): 217-224 (1997) |
1 | T. Bairley | [2] |
2 | A. Bertolet | [2] |
3 | K. Carpenter | [2] |
4 | Keith M. Carrig | [1] [2] |
5 | Albert M. Chu | [1] [2] |
6 | A. Dean | [2] |
7 | T. Decker | [2] |
8 | Frank D. Ferraiolo | [1] [2] |
9 | V. Girardi | [2] |
10 | S. Kenyon | [2] |
11 | Y. Lapid | [2] |
12 | M. Murphy | [2] |
13 | John G. Petrovick | [1] [2] |
14 | D. Phan | [2] |
15 | G. Rodgers | [2] |
16 | Richard J. Weiss | [1] [2] |
17 | D. Willmott | [2] |