Jun Sawada

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10EEErik Reeber, Jun Sawada: Combining ACL2 and an automated verification tool to verify a multiplier. ACL2 2006: 63-70
9EEJun Sawada, Erik Reeber: ACL2SIX: A Hint used to Integrate a Theorem Prover and an Automated Verification Tool. FMCAD 2006: 161-170
8EEWendy Belluomini, Damir Jamsek, Andrew K. Martin, Chandler McDowell, Robert K. Montoye, Hung C. Ngo, Jun Sawada: Limited switch dynamic logic circuits for high-speed low-power circuit design. IBM Journal of Research and Development 50(2-3): 277-286 (2006)
7EEJun Sawada, Ruben Gamboa: Mechanical Verification of a Square Root Algorithm Using Taylor's Theorem. FMCAD 2002: 274-291
6 Jun Sawada, Warren A. Hunt Jr.: Verification of FM9801: An Out-of-Order Microprocessor Model with Speculative Execution, Exceptions, and Program-Modifying Capability. Formal Methods in System Design 20(2): 187-222 (2002)
5EEH. Peter Hofstee, Jun Sawada: Derivation of a rotator circuit with homogeneous interconnect. Inf. Process. Lett. 77(2-4): 131-135 (2001)
4EEJun Sawada, Warren A. Hunt Jr.: Hardware Modeling Using Function Encapsulation. FMCAD 2000: 234-245
3EEJun Sawada, Warren A. Hunt Jr.: Results of the Verification of a Complex Pipelined Machine Model. CHARME 1999: 313-316
2 Jun Sawada, Warren A. Hunt Jr.: Processor Verification with Precise Exeptions and Speculative Execution. CAV 1998: 135-146
1 Jun Sawada, Warren A. Hunt Jr.: Trace Table Based Approach for Pipeline Microprocessor Verification. CAV 1997: 364-375

Coauthor Index

1Wendy Belluomini [8]
2Ruben Gamboa [7]
3H. Peter Hofstee [5]
4Warren A. Hunt Jr. [1] [2] [3] [4] [6]
5Damir Jamsek [8]
6Andrew K. Martin [8]
7Chandler McDowell [8]
8Robert K. Montoye [8]
9Hung C. Ngo [8]
10Erik Reeber [9] [10]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)